1. Field of the Invention
This invention relates to a bus linkage unit linking a bus of a computer system to a bus of an expansion box or a bus of another computer system, and, more particularly, to a bus linkage unit enabling a bus master connected to a bus of an expansion box or a bus of another computer system, to participate in bus arbitration by the main computer system.
2. Prior Art
When the functions of a conventional personal computer are expanded, it is conventional to lead out all signal lines of the bus through a connector or the like, to connect to a bus within an expansion box. However, as the performance of personal computers becomes more and more sophisticated year after year, high speed signals increase over the bus, and the number of signal lines significantly increases for the bus, resulting in the following problems:
(1) The waveforms of signals are distorted as the signal lines, through which high-speed signals are carried, are extended. PA1 (2) High-speed signals cause a problem of unnecessary emission. PA1 (3) External noise tends to easily intrude, causing malfunctions. PA1 (4) The increased number of signal lines necessitates using connectors with an increased number of contacts. PA1 (5) Use of connectors, having an increased number of contacts, tends to lower reliability.
These problems used to put severe restrictions on the extendibility of sophisticated personal computers.
To cope with these problems, it is proposed to link a bus of a computer to a bus of another computer or a bus of peripheral equipment through a communication link.
For instance, the computer system, disclosed in Published Unexamined Patent Application (PUPA) No. 59071527, links a host processor and remote equipment with one communication link, and supports cycle stealing transfer.
Also, the system bus data linkage unit, disclosed in PUPA No. 3-4351, provides special linkage modules for the respective parallel buses in order to connect, for example, two parallel buses with a serial link. Thus, when data is sent from the system initiator of one parallel bus to the system target of the other parallel bus, the link module of the one parallel bus simulates the other parallel data, and converts the parallel data into serial data, which is then sent to the other parallel bus. The link module of the other parallel bus converts the serial data into parallel data, simulates the system initiator, and transfers the parallel data to the system target.
When a bus arbitration technique is introduced to allow two or more bus service requesting resources, such as bus masters and DMA slaves (resources using a DMA controller) in the above configuration where one system is linked to the other through a communication channel, it is necessary to transmit bus arbitration signals as well through the channel. Especially in a configuration such that local arbiters are installed in bus masters and the like, and thus a special procedure is adopted for distributed arbitration, as in, for example, a bus architecture conforming to the specifications of the MicroChannel (a trademark of International Business Machines Corporation), there is a need to invent and adopt a special device.
The following are prior references relevant to this invention:
IBM Technical Disclosure Bulletin, Vol. 28, No. 6, pp. 2346-2347, "STACKABLE UNIT PACKAGING CONCEPT," (Nov. 1985): This publication discloses a technique for connecting signal lines between two functional units through a connector by putting one functional unit on the housing of the other functional unit equipped with extendable buses.
IBM Technical Disclosure Bulletin, Vol. 26, No. 10A, pp. 5147-5152, "EXTENDED DATA BUS WITH DIRECTION AND ENABLE CONTROL FEATURES," (March 1984): This publication discloses a method of controlling data transfer directions such that a computer system and an expansion system are linked in parallel and directions of data transfer are controlled by detecting from which of the two systems the DMA request in question has been issued.
PUPA No. 56-166536: This gazette discloses a technique for asynchronous communication between interface buses such that a pair of extenders are installed between two interface buses, and asynchronous communication control is exercised between the extenders to establish asynchronous communication between the interface buses. It also discloses a technique for connecting two buses in parallel through the use of an optical cable.
IBM Technical Disclosure Bulletin, Vol. 19, No. 8, pp. 3139-3143, "SERIAL CHANNEL TO I/O INTERFACE," (Jan. 1977): This publication discloses a serial I/O interface replacing a parallel I/O interface. This interface allows data to be transferred serially by use of frames or packets each consisting of a flag and its subsequent serial data.
PUPA No. 3-88055, 1991: This gazette discloses a technique for setting up a data chain (CCW record) flag and a command chain (CCW record link) flag in an extender connecting a serial channel to a device on a parallel bus.
Patent Application No. 3-15926: This patent application describes an invention relating to speeding up serial data transfer between a channel and a device by use of a microcode routine.
PUPA No. 62-251951: This patent application discloses the invention whereby a transfer byte count can be included in the command field of an extender connecting a serial channel with a parallel device.